has announced that it is changing its processor architecture roadmap and will break its customary annual "tick-tock" cycle because of ongoing challenges with shrinking transistors below the current 14nm threshold. Cannonlake, which was due to replace Skylake in 2016, will now be delayed till 2017. A new 14nm generation codenamed Kaby Lake will take its place for the 2016 product refresh cycle.
Nothing is known about Kaby Lake at this point, except that it will be fabricated at 14nm. Cannonlake in 2016 would have been a shrink of Skylake without any major architectural changes, ie a "tick" whereas Skylake itself is a "tock", ie a new architecture on the fabrication process proven by its own predecessor. Kaby Lake could end up being a very mild refresh with a new name for marketing purposes, or might allow the company to roll out new innovations that it couldn't have done with a "tick" generation.
Skylake is still on target for launch towards the end of this year, and will be known as Intel's sixth-generation Core microarchitecture. It will replace current Haswell and Broadwell chips across devices ranging from ultra-thin tablets to desktop workstations and servers.
The announcement was made by Intel CEO Brian Krzanich during a second-quarter earnings call with shareholders and analysts. Earnings were better than expected, thanks largely to strong demand for data centre products which compensated for the ongoing decline of consumer PC processors.
Intel recently celebrated the 50th anniversary of Moore's Law, the guiding principle stated by company founder Gordon Moore, that the number of transistors in a processor would double every 18-24 months. Moore's Law has held true so far, but the delay in transitioning to 10nm highlights the complexities inherent to shrinking semiconductors while managing power leakage. IBM last week demonstrated an experimental processor with functioning 7nm transistors, but it is not ready for commercial applications yet.