MediaTek Dimensity 9500 Launch Date Announced; Company Designs Its First Chip Using TSMC’s 2nm Process

MediaTek announced the launch date of the next-gen Dimensity flagship SoC, expected to be the MediaTek Dimensity 9500, on Tuesday. The firm has also confirmed that it has completed the design and testing phase of its flagship chip using TSMC's 2nm manufacturing process, which is currently one of the most advanced semiconductor technologies. This makes MediaTek one of the first companies to use TSMC's 2nm process, and the mass production of this chip is expected to arrive by the end of 2026. 

MediaTek Dimensity 9500 SoC Will Launch on September 22

In a post on Weibo, MediaTek confirmed that the next-gen flagship chipset, expected to be the MediaTek Dimensity 9500 SoC, will launch on September 22 at 2pm local time (4:30pm IST). The company did not reveal any other details about the upcoming chip.

The upcoming MediaTek Dimensity 9500 will reportedly sport a 1+3+4 CPU layout, including a single Travis core running at 4.21GHz, three Alto cores at 3.5GHz, and four Gelas cores at 2.7GHz. Travis and Alto are part of Arm's latest X9 series, while Gelas comes from the upgraded A7 line. 

MediaTek's upcoming Dimensity 9500 chip could feature a Mali-G1 Ultra MC12 GPU, with 40 percent higher efficiency and enhanced ray tracing, allowing ray-traced gaming to surpass100fps. Additional highlights may include 16MB L3 cache, 10MB SLC, SME instruction support, NPU 9.0 with 100 TOPS AI performance, LPDDR5x memory at 10,667Mbps, and support for UFS 4.1 storage for faster data transfer.

Vivo X300 series and the Oppo Find X9 lineup could be among the first few handsets to launch with the MediaTek Dimensity 9500 SoC.

MediaTek Develops First Chip Using TSMC's 2nm Process

MediaTek has worked with TSMC to create a chip using the advanced N2P process, the company revealed in a press release. It is claimed to focus on high-performance, energy-efficient chips for mobile, computing, automotive, and data centre use.

TSMC's 2nm N2P process is the first with a nanosheet transistor design. It will go into mass production in late 2026 and could launch with the MediaTek Dimensity 9600 SoC. It is claimed to offer up to 18 percent higher performance at the same power, up to 36 percent lower power at the same speed, and 1.2× greater logic density compared to the N3E process.